Rapid advances in microelectronic devices are continuously demanding finer pitch connections between electronic chip carriers and printed circuit boards (on the order of a few hundred micrometer pitch or less). This demand as well as the demand for low cost electronic packages have led to the increased use of surface mount technology (SMT) over the conventional plated-through-hole (PTH) technology in the recent years. At present, more than two thirds of integrated circuits (IC) including both memory and logic devices are assembled by SMT. SMT packages commonly found in a PCB assembly are leaded chip carriers such as small outline integrated circuits (SOIC), plastic leaded chip carrier (PLCC); quad flat pack (QFP), thin small outline package (TSOP), or tape carrier package (TCP). These leaded chip carriers, mostly plastic packages, depend on a perimeter connection between an IC package and a printed circuit board (PCB). The perimeter connection scheme of SMT packages has reached its limitation in terms of connection pitch and I/O capability, particularly for high performance IC's.
To relieve the limitations of perimeter connections and thereby to increase the packaging density, area array connection schemes have become popular recently. Some of the area array packages developed for SMT include the ball grid array (BGA) package, solder column grid array (SCGA), direct chip attach (DCA) to PCB by flip chip connection, tape ball grid array (TBGA), or chip scale packages (CSP). Among them, BGA is currently the most popular one, where solder balls connect a module carrying an IC to a PCB. This technology is an extension of the controlled collapse chip connection (C4) scheme originally developed for solder bump connection of multiple chips to a ceramic substrate. The IC on the module can be connected to the module in several ways as taught by Mulles et al., U.S. Pat. No. 5,241,133; Massingill, U.S. Pat. No. 5,420,460; and Marrs et al., U.S. Pat. No. 5,355,283 among others. Ceramic or organic module substrates can be employed depending on the performance, weight and other requirements. The common feature, however, is that the connection between the IC carrier and the next level PCB is accomplished by an array of solder balls which are attached to the module by a solder alloy with a lower melting temperature. BGA packages have several advantages over the conventional leaded chip carriers; small and low profile package, large, standard pitch for the same I/O count, high assembly yield due to self-alignment, rugged package (no lead deformation), better electrical/thermal performance, and compatibility with SMT assembly process. A few drawbacks of BGA packages are noted such as difficulty of visual inspection of solder joints, difficulty in testing the BGA assembly without damage to the soft solder BGA balls, lack of easy demountability of EGA assembly from the PCB once assembled, cost issues of EGA modules, control of solder ball connection process, lack of field reliability data, and others.
As mentioned earlier, there are several options depending on the choice of module materials, such as plastic BGA, ceramic EGA, and tape BGA. Ceramic BGA is more expensive than plastic EGA, but it has a better proven reliability over the plastic EGA. However, one major weakness of ceramic BGA is the large mismatch of thermal coefficient of expansion (TCE) between a ceramic module and a polymeric PCB. This limits the maximum size of ceramic BGA module that can be mounted on a PCB, to about 32 mm on edge with the state-of-the-art technology. For a ball pitch of 50 mil, this EGA module can have about 625 I/O connections. Plastic EGA has an advantage over a ceramic EGA in terms of TCE mismatch because of a better materials compatibility between the module and substrate materials. Since most of the plastic BGA's have a perimeter connection to a chip by wire bonding, the overall packaging density is much lower than that of a ceramic EGA which could have an area array connection to a chip by flip chip or C4 technology.
Solder balls used in BGA are typically 90% Pb-10% Sn in composition for ceramic BGA, 63% Sn-37% Pb eutectic solder for plastic BGA. The solder balls are connected by reflowing Sn-Pb eutectic solder paste materials used in SMT soldering. During the assembly of ceramic BGA's, only the Sn-Pb eutectic solder paste is melted, not the solder balls of a high melting temperature. During the reflow process, several reactions occur simultaneously at the soldering interfaces: dissolution of terminal metallurgies such as Au or Cu into the molten Sn-Pb eutectic solder, formation of Sn-containing intermetallic. phases, interdiffusion of Sn and Pb across the liquid-solid interface, void formation in the solidifying Sn-Pb eutectic solder paste materials, and others. These reactions would affect the joint integrity and could degrade the long-term reliability. In fact, most of these BGA assemblies tend to fail by thermal cycling fatigue with a failure locus predominantly localized at or near the low melt solder/EGA ball interface region.
Another problem associated with EGA modules is the difficulty in testing and burning in the assembly after a silicon die has been assembled on them. Although the die may have been tested prior to EGA assembly, the devices and circuitry have to be retested because of the additional temperature and handling exposures involved in the EGA assembly. This poses a problem because the only way to access the chip devices is through the EGA balls and establishing reliable contact for testing and burn in is difficult with the existing apparatus that is geared towards pin grid array modules. Even if alternate means could be designed to contact the BGA balls, these would most likely require mechanical pressure of pads or bed of nails type pin arrays on a test board against the balls. These approaches would be unreliable due to the softness of the BGA balls and the tenacious oxide present on their surface. Additionally, the application of pressure during the testing can deform or even dislodge the BGA balls causing yield loss. From a burn in perspective, one has to contend additionally with the possible reaction of the BGA ball with the test bed pads or pins at the elevated temperatures required for this purpose.
One printed wiring board scheme proposed in the prior art (Swamy, U.S. Pat. No. 5,459,287) may be able to partly address this problem. This patent suggests a structure on the board that results in a limited angular area of bonding between the BGA ball and a metallized blind via on the top surface of the board using a solder that melts at a lower temperature than the BGA ball. The structure is claimed to be a socketed BGA since the BGA is expected to be partially located in place by these blind vias. U.S. Pat. No. 5,459,287, however, does not teach the use of such a scheme for solving the problems described above. One could envision that the test and burn in board could be provided with the above configuration and the modules to be tested can be assembled on them as described above. After the completion of the test and burn in process, the modules can be removed from the test board by a thermal and mechanical means taking advantage of the limited area of wetting between the BGA ball and the board. The main limitation of using such an approach would be the perturbation of the BGA ball geometry and its surface composition by the process. Potential for mechanical damage and formation of defects in the ball/module interface due to these additional process steps is also quite high.